[ipxe-devel] Unable to boot Linux kernel for arm64 architecture

[Mark Rutland]

On Mon, Mar 20, 2017 at 09:05:59PM +0200, Michael Brown wrote:
> On 20/03/17 20:57, Mark Rutland wrote:
> >On Mon, Mar 20, 2017 at 08:27:13PM +0200, Michael Brown wrote:
> >>You can add "EXTRA_CFLAGS=-mstrict-align" to your build command
> >>line. That will build a (much bigger and slower) iPXE binary in
> >>which all potentially unaligned accesses will be handled using byte
> >>loads/stores and shifts as needed; this should work around the buggy
> >>platform firmware.
> >
> >Sorry to be the bearer of bad news, but the above might not be
> >sufficient. :(
> >
> >When the MMU is off, LDXR/STXR sequences are not guaranteed to function
> >as they do with the MMU+caches on, and are permitted to behave in a
> >number of surprising ways. AFAICT that would affect the ipxe bitops.
> 
> Thanks for the heads-up.  Fortunately the only current user of
> test_and_{set,clear}_bit() is xenevent_pending(), so any non-Xen
> uses should survive.  Are there any other instructions that might be
> affected?

Yes, though from a quick grep it looks like IPXE isn't using any that I
was able to think of:

* DC ZVA may fault, since all memory is treated as Device memory.

* As with LDXR/STXR, ARMv8.1 atomics won't necessarily work.

* Cache maintenance ops and barriers are ordered differently against
  non-cacheable memory accesses. Additional barriers and/or cache
  maintenance may be necessary in some cases.

I'm not sure if there's anything else.

Thanks,
Mark.